SIMD (Single Instruction Multiple Data) processor array systems have conventionally been used for image processing of video signals and the like.
For example, NPL 1 presents an SIMD processor array which successively inputs and outputs image data at respective sides as shown in FIG. 12. Based on an SIMD control, each processing element (hereinafter, “PE”) 510 applies an instruction broadcast from a control processor (hereinafter, “CP”) 520 to the data on its own local memory, whereby parallel processing corresponding to the number of PEs is implemented. All the PEs simultaneously send data to other PEs located at the same distances in the same direction, and receive data delivered from other PEs at the same time. The inter-PE data transfer technology disclosed is the most common to SIMD processor arrays.
In order for future SIMD processor array systems to support a wider variety of more sophisticated applications, it is desired to provide a technology for more flexible data exchange between PEs. For example, PTL 1 discloses a technique for providing a transfer pattern of higher complexity. PTL 2 discloses a more effective method for using PE connection lines in a PE array of grid configuration.